Full Custom VLSI Implementation of High-Speed 2-D DCT/IDCT Chip
نویسندگان
چکیده
In this paper we present a full-custom VLSI design of highspeed 2-D DCT/IDCT processor based on the new class of time-recursive algorithms and architectures which has never been implemented to demonstrate its performance. We show that the VLSI implementation of this class of DCT/IDCT algorithms can easily meet the high-speed requirements of HDTV due to its modularity, regularity, local connectivity, and scalability. Our design of the 8 x 8 DCT/IDCT can operate at 50 MHz with a 400 Mbps throughput based on a very conservative estimate under 1 . 2 ~ CMOS technology.
منابع مشابه
VLSI design of high-speed time-recursive 2-D DCT/IDCT processor for video applications
In this paper we present a full-custom VLSI design of high-speed 2-D DCTRDCT processor based on the new class of time-recursive algorithms and architectures which has never been implemented to demonstrate its performance. We show that the VLSI implementation of this class of DCT/IDCT algorithms can easily meet the high-speed requirements of highdefinition television (HDTV) due to its modularity...
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